Priority is claimed to Japanese Patent Application Number JP 2005-231120 filed on Aug. 9, 2005, the disclosure of which is incorporated herein by reference in its entirety.
1. Field of the Invention
The present invention relates to a variable capacitance diode, and more particularly relates to a variable capacitance diode which can contribute to reduction in a substrate area and in costs of an installation thereof when the variable capacitance diode is included.
2. Description of the Related Art
FIGS. 4A and 4B are views showing an example of a conventional variable capacitance diode. FIG. 4A is a circuit diagram and FIG. 4B is a plan view.
As shown in FIG. 4A, a variable capacitance diode D formed of two variable capacitance diodes D1 and D2 is a three-terminal element in which a common cathode terminal CA formed by common connection of respective cathodes of the diodes, and respective anode terminals A1 and A2 of the diodes are drawn to the outside.
FIG. 4B is a plan view showing an example where the foregoing variable capacitance diode D is integrally formed on a silicon substrate.
The variable capacitance diode D is formed by fixing a chip 23 to a lead frame 24 or the like and then by sealing the chip 23 and the lead frame 24 with a package 25 such as a resin layer. Specifically, in the chip 23, two p− type impurity regions 22 to be anodes are provided in an island manner on an n− type semiconductor substrate 21 to be a cathode. By disposing the p− type impurity regions 22 of the two variable capacitance diodes D1 and D2 on the same n− type semiconductor substrate 21, the circuit shown in FIG. 4A is realized. As external terminals, the common cathode terminal CA and the two anode terminals A1 and A2 are drawn to the outside of the package 25.
FIGS. 5A and 5B are views each showing an LC resonant circuit using the foregoing variable capacitance diode D. Each of FIGS. 5A and 5B shows a circuit diagram, as an example, in the case where a tuning circuit is formed by use of a tuner IC or the like.
FIG. 5A shows an example of an oscillator tuning circuit (frequency selection circuit). This circuit includes a variable capacitance diode D in which the cathodes of the two variable capacitance diodes D1 and D2 shown in FIGS. 4A and 4B are connected to each other and a predetermined voltage VT is applied through a resistance R1. In this case, the second anode terminal A2 of the variable capacitance diode D2 and the first anode terminal A1 of the variable capacitance diode D1 are at potentials lower than that of the voltage VT applied to the common cathode terminal CA. Thus, the second anode terminal A2 is directly grounded, and the first anode terminal A1 is grounded through a resistance Rb. One end of a capacitor Cb is connected to the first anode terminal A1, one end of a coil L1 is connected to the other end of the capacitor, and one end of a capacitor C1 is connected to the other end of the coil L1. Moreover, the other end of the coil L1 is connected to a terminal B, and the other end of the capacitor C1 is grounded.
Accordingly, a parallel LC resonant circuit is configured of a combined capacitance obtained by series connection of the variable capacitance diodes D1 and D2 and the capacitors Cb and C1, and inductance of the coil L1. A resonance frequency of a desired receiving frequency is selected with the voltage VT applied to the variable capacitance diode D, and is inputted to the IC.
The capacitor Cb is connected for cutting a direct current. Thus, a bias applied from the terminal B is prevented from flowing toward the variable capacitance diode D. Meanwhile, a high-frequency signal is inputted from the terminal B and flows into the IC. Although the high-frequency signal also flows toward the variable capacitance diode D through the capacitor Cb, part of the signal leaking into the ground through the high resistance Rb is very little and thus can be ignored. This technology is described, for instance, in Japanese Patent Application Publication No. Hei 5 (1993)-218893.
Moreover, FIG. 5B shows an example of a circuit for three-point tracking by use of an element including two variable capacitance diodes in one package with a common cathode terminal.
This circuit is configured, for example, of a receiver tuning circuit and an oscillator tuning circuit in one package. In the circuit, LC resonant circuits are connected to respective output terminals of two anode terminals A1 and A2 of a variable capacitance diode D.
The second anode terminal A2 is connected to one end of a capacitor Co and one end of a resistance Ro having a high resistance value. The other ends of the capacitor Co and the resistance Ro are grounded, respectively. Here, in the LC resonant circuit (Lo, Cp, Co, A2, Cg and C1) on the second anode terminal A2 side, a padding capacitor Cp for correcting tracking properties is serially connected between a coil Lo and the variable capacitance diode D.
Meanwhile, the first anode terminal A1 is connected to one end of a capacitor Cr and one end of a coil Lr, and the other ends of the capacitor Cr and the coil Lr are grounded, respectively. Moreover, the coil Lr is connected to the IC through a capacitor Cc for cutting a direct-current bias.
A potential VT is applied to a common cathode terminal CA of the variable capacitance diode D, and a capacitance varies. Moreover, the common cathode terminal CA is grounded through a capacitor Cg. Specifically, at an input terminal of the common cathode terminal CA, the direct-current bias is at a positive potential (H level), and a high-frequency signal has a GND potential (L level).
In the variable capacitance diode used in the tuning circuit, the potential VT higher than those of the first and second anode terminals A1 and A2 is applied to the common cathode terminal CA. Thus, a circuit configuration in which the first and second anode terminals A1 and A2 are grounded (the GND potential) is generally adopted.
However, a high-frequency signal is inputted to a signal line to which the first anode terminal A1 or the second anode terminal A2 is connected. Therefore, for example, in the oscillator tuning circuit, the first anode terminal A1 or the second anode terminal A2 is grounded through the resistance Rb or Ro, each of which has a high resistance value, to prevent a leak of the high-frequency signal (FIGS. 5A and 5B). In the receiver tuning circuit, any of the anode terminals is grounded through the coil Lr to prevent a leak of the high-frequency signal (FIG. 5B).
Moreover, in the LC resonant circuit, the signal line side connected to the input terminal to the IC is set at the H level of the high-frequency signal. Therefore, the terminals of the LC resonant circuit on the side not connected to the input terminal to the IC (the terminals opposite to the terminals on the IC side among the terminals on both ends of the coils L1, Lo and Lr) are grounded and set at the L level of the high-frequency signal. In addition, since the direct-current bias is also inputted to the signal line at the L level, the direct-current bias is cut by connecting the capacitors Cl, Co and Cr.
In the case of FIG. 5A, the coil L1 included in the LC resonant circuit can be realized with a coil (solenoid) having a simple structure. However, the resistance Rb is required in order to ground the first anode terminal A1 of the variable capacitance diode D in series. Specifically, a connection point P′ for grounding the first anode terminal A1 is on the signal line in which the high-frequency signal is at the H level. Thus, it is required to prevent the leak of the high-frequency signal by connecting the resistance Rb, and to ground the first anode terminal A1. Consequently, there is a problem that increases in the number of components and in a substrate area are inevitable and costs for the set are increased.
Meanwhile, in the circuit shown in FIG. 5B, the first anode terminal A1 is grounded for direct current through the coil Lr. However, the signal line to which the second anode terminal A2 is connected cannot be grounded since the direct-current bias is cut by the padding capacitor Cp. Therefore, a connection point P is provided between the padding capacitor Cp and the second anode terminal A2, and the second anode terminal A2 is grounded. However, since the connection point P is on the signal line in which the high-frequency signal is at the H level, it is required that the high resistance Ro be connected for preventing the leak of the high-frequency signal. Therefore, also in this case, the increases in the number of components and in the substrate area lead to the increase in costs of the set.